A CMOS digital-controlled oscillator for All-digital PLL frequency synthesizer

Abstract

A broadband CMOS digital-controlled oscillator (DCO) for All-digital PLL (ADPLL) frequency synthesizer was developed, which achieves wide tuning range and low phase noise. The DCO employs a LC Voltage-controlled oscillator (VCO) and a current-steering Digital-to-Analog Convertor (DAC). In order to lower the VCO phase noise while fulfill continuous tuning range of 2GHz, P-type AMOS varactors are used, which connect to LC tank through a MIM coupling capacitor. As a digital interface, the DAC adopts dynamic element matching (DEM) and high speed ΣΔ modulation for mitigating the current source mismatch and enhance the frequency resolution, respectively. This DCO is implemented in a 65 nm CMOS RF technology. The test results show that, consuming 19.8mW under a 1.2 V supply, the proposed DCO can be tuned from 13.69 GHz to 15.93 GHz and exhibits phase noise of −99dBc/Hz at 1 MHz offset from the 15 GHz carrier in the ADPLL frequency synthesizer. The core LC VCO figure-of-merit (FoM) of −169.6dBc/Hz and FoM T of −173.1dBc/Hz are achieved.