Abstract

A four-channel 1024-b time-to-digital converter chip which records input signals to memory cells at 1-ns intervals, has been developed. The chip was fabricated using 0.8- mu m CMOS technology on a 5-mm by 5.6-mm die. It dissipates only 7 mW/channel under typical operating conditions. Tests show that overall linearity and stability are very good. >

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