Abstract

The globalization of integrated circuits (ICs) design and fabrication has given rise to severe concerns on the devastating impact of subverted chip supply. Hardware Trojan (HT) is among the most dangerous threats to defend. The dormant circuit inserted stealthily into the chip by the advisory could steal the confidential information or paralyze the system connected to the subverted chip upon the HT activation. This paper presents a transient power supply current sensor to facilitate the screening of an IC for HT infection. Based on the power gating scheme, it converts the current activity on local power grid into a timing pulse from which the timing and power-related side channel signals can be externally monitored by the existing scan test architecture. Its current comparator threshold can be calibrated against the quiescent current noise floor to reduce the impacts of process variations. Postlayout statistical simulations of process variations are performed on the ISCAS’85 benchmark circuits to demonstrate the effectiveness of the proposed technique for the detection of delay-invariant and rarely switched HTs. Compared with the detection error rate of a 4-bit counter-based HT reported by an existing HT detection method using the path delay fingerprint, our method shows an order of magnitude improvement in the detection accuracy.

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