Abstract
In this article, we apply a new clock-phase reuse technique to a discrete-time infinite impulse response (IIR) complex-signaling bandpass filter (BPF). This leads to a deep improvement in filtering, especially the stopband rejection, while maintaining the area, sampling frequency, and the number of clock phases and their pulsewidths. Fabricated in 28-nm CMOS, the proposed BPF is highly tuneable and is capable of achieving a 70-dB stopband rejection at 50-MHz offset with 25% duty-cycle clocks while consuming 1.65 mW. The achieved in/out-of-band third-order intermodulation intercept point (IIP3) is +2.5 dB and +17.3 dBm, respectively, and the input-referred noise (IRN) is 1 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {nV}}/{\sqrt {\mathrm{ Hz}}}$ </tex-math></inline-formula> .
Highlights
A Clock-Phase Reuse Technique for Discrete-Time Bandpass FiltersAmir Bozorg , Graduate Student Member, IEEE, and Robert Bogdan Staszewski , Fellow, IEEE
M ONOLITHIC RF wireless receivers have been trending toward high intermediate frequency (IF) or superheterodyne radios due to recent breakthroughs in silicon integration of bandpass channel-select filters [1]–[4]
This structure does not suffer from a reduction in the duty cycle of the clock generator, which is a common issue in the prior-art complex infinite impulse response (IIR) filters [1], and it is capable of running at high frequencies
Summary
Amir Bozorg , Graduate Student Member, IEEE, and Robert Bogdan Staszewski , Fellow, IEEE. Abstract— In this article, we apply a new clock-phase reuse technique to a discrete-time infinite impulse response (IIR) complex-signaling bandpass filter (BPF). This leads to a deep improvement in filtering, especially the stopband rejection, while maintaining the area, sampling frequency, and the number of clock phases and their pulsewidths. Fabricated in 28-nm CMOS, the proposed BPF is highly tuneable and is capable of achieving a 70-dB stopband rejection at 50-MHz offset with 25% duty-cycle clocks while consuming 1.65 mW. The achieved in/out-of-band third-order intermodulation intercept point (IIP3) is +2.5 dB and +17.3 √dBm, respectively, and the input-referred noise (IRN) is 1 nV/ Hz
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