Abstract
This work describes a family of binary Edwards curves that admit modular reductions (an operation that can be responsible for up to 30% of the processing time in point arithmetic) twice as fast than the best usual settings, while essentially being as secure as a binary elliptic curve can be (in terms of being rigid and twist safe). Moreover, we present a hardware architecture with a generic VHDL description that can be synthesized to any FPGA with enough area to support the circuit. For this architecture, we are able to execute a point multiplication by scalar on $$\mathbb {F}_{562}$$ in 2.28 ms on Cyclone IV GX, in 1.23 ms on Virtex-7 and in 1.01 ms on Zynq 7020.
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