A Class of Phase Detector Characteristics for Symbol Synchronizers Yielding Unbiased Estimates

Abstract

Most practical synchronizers operating on a PAM waveform corrupted by additive noise can be analyzed by means of the theory of the phase-locked loop (PLL). In this paper, we present a class of synchronizers for which the equivalent phase detector characteristic is such that the timing instants generated by the voltage controlled clock (VCC) are unbiased with respect to the ideal sampling instants to be used in the data reconstruction path. As a consequence of this, the VCC output signal can directly activate the sampler in the data reconstruction path, without being properly delayed for bias compensation.