Abstract

This letter proposes a useful circuit which can reduce the on-resistance of a p-n-p-n device. This circuit is contrived from experimental results showing that the on-resistance decreases as the value of a resistor inserted between the gate and cathode terminals decreases. The basic operation and features of this circuit are discussed and its usefulness is verified experimentally. The p-n-p-n device having the circuit described here shows significant reduction in the on-resistance at the low forward-current region without degradation of characteristics such as gate triggering. This p-n-p-n device is useful for subscriber line interface circuits which need low on-resistance especially at low current levels.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.