Abstract

As computational demand and energy efficiency of computer systems are becoming increasingly relevant requirements, traditional design paradigms are bound to become no longer appropriate, as they cannot guarantee significant improvements. The approximate-computing design paradigm has been introduced as a potential candidate to achieve better performances, by relaxing non-critical functional specifications. Anyway, several challenges need to be addressed in order to exploit its potential. In this paper, we propose a systematic and application-independent approximate design approach suitable to combinational logic circuits. Our approach is based on non-trivial local rewriting of and-inverter graphs (AIG), reducing the number of AIG-nodes and possibly resulting in lower hardware resources requirements. We adopt multi-objective optimization to carefully introduce approximation while aiming at optimal trade-offs between error and hardware-requirements. We evaluate our approach using different benchmarks, and, in order to measure actual gains, we perform actual synthesis of Pareto-optimal approximate configurations. Experimental results show that the proposed approach allows achieving significant savings, since resulting approximate circuits exhibit lower requirements and restrained error w.r.t. their exact couterparts.

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