A Cascade Point of Load DC–DC Converter With a Novel Phase Shifted Switched Capacitor Converter Output Stage

Abstract

This paper presents the analysis, design, modeling and control of a cascaded two-stage step-down dc–dc converter with a conventional synchronous buck converter in the first stage and a new phase shifted switched capacitor (PSSC) buck converter in the second stage. Higher efficiency and higher power density compared to the conventional multiphase buck converter are the prominent features of the proposed architecture which make it suitable as a point of load converter, widely used in powering computing, communication and networking equipment. The first stage buck converter is operated at high switching frequency with extended duty ratio and is designed for high efficiency. The second stage PSSC converter with low input voltage attains high efficiency when operated at a fixed conversion ratio with low switching frequency and a simple constant current charging technique. A laboratory prototype converter achieved a peak efficiency of $86.8\%$ at $30$ -A load current while operating at $12$ -V input voltage and $1.3$ -V output voltage. The capacitor-based output power stage drastically reduces the number of inductors compared to the multiphase buck converter. A low frequency small signal model of the converter and a state feedback controller for the output voltage are developed analytically. The closed-loop transient performance of the converter using this state feedback controller is also verified experimentally.