Abstract

For the conventional carrier-based pulse width modulation (CBPWM) strategies of neutral point clamped (NPC) three-level inverters, the higher common-mode voltage (CMV) is a major drawback. However, with CMV suppression strategies, the switching loss is relatively high. In order to solve the above issue, a carrier-based discontinuous PWM (DPWM) strategy for NPC three-level inverter is proposed in this paper. Firstly, the reference voltage is modified by the twice injection of zero-sequence voltage. Switching states of the three-phase are clamped alternatively to reduce both the CMV and the switching loss. Secondly, the carriers are also modified by the phase opposite disposition of the upper and lower carriers. The extra switching at the border of two adjacent regions in the space vector diagram is reduced. Meanwhile, a neutral-point voltage (NPV) control method is also presented. The duty cycle of the switching state that affects the NPV is adjusted to obtain the balance control of the NPV. Still, the switching sequence in each carrier period remains the same. Finally, the feasibility and effectiveness of the proposed DPWM strategy are tested on a rapid control prototype platform based on RT-Lab.

Highlights

  • Compared with two-level inverters, neutral point clamped (NPC) three-level inverters have advantages of lower output harmonics distortion and lower dv/dt of the power device

  • The common-mode voltage emerges between neutral points of DC-link capacitors and stator windings in NPC three-level inverter fed motor system

  • SI as anand example, the reference reference voltage, current the when neutral point curren voltage is in region RI, phase B is clamped to switching state O and dBO = 1

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Summary

Introduction

Compared with two-level inverters, NPC three-level inverters have advantages of lower output harmonics distortion and lower dv/dt of the power device. The first is the improvement of topology, and the second is the improvement of modulation strategy For the former, the CMV can be reduced by several methods, such as the addition of the fourth bridge [7,8], the modification of the DC-link structure [9], the addition of the common-mode inductance [10] and the addition of the filter [11,12]. A double modulation wave carrier-based PWM strategy (DMWCBPWM) is proposed in [15], the reference voltage is modified to reduce the CMV and the NPV ripple simultaneously. Conventional CMV suppression PWM strategies only focus on the performance of CMV and are not suitable for medium-voltage high-power traction applications. DPWM strategies are extremely suitable for high-power medium-voltage three-level inverters. The experimental setup comprises an OPAL-RT OP5700 rapid control prototype and an NPC three-level inverter fed R-L load

Topology of the NPC Three-Level Inverter
Common-mode Voltage
Switching Frequency
Switching Sequence Design
Carrier-Based Implementation
NPV Balance Control
Compensation
Experimental Verification
Common-Mode Voltage
Switching Loss
Harmonic Distortion
Neutral Point Voltage
Conclusions
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