A Capacitance Ratio Method Used for Leff Extraction of an Advanced Metal-Oxide-Semiconductor Device with Halo Implant

Abstract

The effective channel length of a metal-oxide-semiconductor (MOS) transistor is usually extracted using current–voltage (I–V) methods. In a current MOS transistor, local surface channel mobility degradation due to halo implants used for obtaining better short channel performance in deep-quarter micron devices degrades the extraction accuracy of the value of effective channel length (Leff). This paper describes an experimental wafer split under varying halo implant conditions implemented to determine the accuracy of the Leff values extracted using various methods based on the advanced 0.15 µm complementary metal-oxide-semiconductor (CMOS) technology. The integrated systems engineering technology computer-aided design (ISE TCAD) two-dimensional (2D) simulation tool and a modified capacitance–voltage (C–V) method were adopted to help determine the metallurgical channel-length Lmet for each transistor under various halo implant conditions. The relationships between Lmet and Leff values extracted using various methods (including I–V and C–V methods) were also compared. In using the proposed modified C–V method [capacitance–ratio (C–R) method], more consistent and reasonable Leff data can be obtained even when a heavy halo implant dose is used.