A CAM fault-tolerant strategy for multiprocessor by using bloom filter and history lookup table

Abstract

A content addressable memory (CAM) like conventional memories can be affected by the occurrence of single event upsets (SEUs) to cause different effects. In this paper, a fault-tolerant strategy proposed at system level can be applied to a CAM used as the coherence directory in the context of multiprocessor. For one thing, with the combined use of an interleaved parity bits protection scheme, a probabilistic structure called Bloom filter is adopted to signal if a given data is presented. Moreover, a novel history lookup table is proposed to compensate the limitation of the Bloom filter used in multiprocessor. It could denote an accurate count of data sharers to check the response of the CAM in conjunction with the Bloom filter. For the different types of errors detected, the proposed strategy further presents the corresponding solutions to maintain coherence amongst the private caches. Simulation results show that, the proposed technique can reduce the incremental execution time by an average 40% at the cost of slightly increased area and power consumption.