A Bypass-Switching SAR ADC With a Dynamic Proximity Comparator for Biomedical Applications

Abstract

A bypass-switching successive approximation (BSSA) register analog-to-digital converter (ADC) employing a newly proposed dynamic proximity comparator is presented in this paper. By exploiting the current characteristics of a current correlator, the proposed comparator generates the bypass signal directly along with the polarity comparison result. The bypass window size can be adjusted to optimize the power reduction for different sensing applications with low-voltage sensitivity. A BSSA logic circuit is adopted with reduced number of logic gates as well as switching power. A prototyped chip including a proposed ADC has been designed and fabricated in a 0.18- $\mu \text{m}$ CMOS process occupying an area of 0.041 mm2. With a supply voltage of 0.6 V and at a sampling rate of 50 kS/s, the measured signal-to-noise-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 56.9 and 68.7 dB, respectively, achieving an effective number of bits (ENoB) of 9.16. The ADC consumes power of 114 nW while digitizing sinusoidal inputs. With a bypass window size of ±32 LSBs, the designed ADC consumes only 76 nW when quantizing full-scale electrocardiography signals that are generated from a certified commercial simulator, exhibiting a figure-of-merit (FoM) of 2.66 fJ/conversion-step. Besides ECG signals, the ADC is also demonstrated by digitizing electromyography and electrooculography signals from human bodies.