A Built-In Self-Calibration Scheme for Memristor-Based Spiking Neural Networks

Abstract

The memristor-based neuromorphic computing architectures, which are based on the resistive random-access memory (RRAM) cell array, have been widely investigated recently. They are used for implementing both the deep neural network (DNN) and spiking neural network (SNN) models, trying to achieve better energy efficiency in AI computing. In the memristor-based SNNs, the synaptic weights are normally implemented by a memristor cell array, and the neurons are mainly analog circuits. Since the memristors and analog circuits are sensitive to variation in process parameters, the inference accuracy of the SNNs can degrade due to process variation, even for the SNNs that pass the production test. In this paper, we first investigate the impact of process variation on the SNNs, such as the memristor resistance variation and device parameter variation. We then propose a calibration scheme that can effectively recover the inference accuracy, given process variation in the specified range. Also, we develop a built-in self-calibration (BISC) architecture based on an SNN chip that we have designed. Experimental results show that the inference accuracy of the SNN ASIC can be improved by up to 76.8%, with only 1% silicon area overhead.