Abstract
In this paper, a BSP (bulk synchronous parallel) Bareiss algorithm for Toeplitz system is described. We investigate various data distribution and scheduling strategies for mapping a typical class of systolic array algorithms onto BSP machines. Load balance, both in communication and computation, as well as linear speedup have been achieved for the Toeplitz system solver and at the same time the minimum memory requirement is achieved. An implementation has been tested on Sun workstations, an SGI Power Challenge, and an IBM SP2, using the Oxford BSPlib (Hillet al., 1997).
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