A Broadband Asymmetrical GaN MMIC Doherty Power Amplifier with Compact Size for 5G Communications

Peisen Cheng,Hongling Xiao,Chun Feng,Xiaoliang Wang,Quan Wang,Yeting Jia,Zhichao Liu,Wei Li,Lijuan Jiang

doi:10.3390/electronics10030311

Abstract

This paper proposes a broadband asymmetrical monolithic microwave integrated circuit (MMIC) Doherty power amplifier (DPA) using 0.25-μm gallium-nitride process with a compact chip size of 2.37 × 1.86 mm2 for 5G communication. It adopts an unequal Wilkinson’s power divider with a ratio of 2.5:1, where 71.5% of the total power is transferred to the main amplifier for higher gain. Different input matching networks are used to offset phase difference while completing impedance conversion. This design also applies a novel topology to solve the problem of large impedance transformer ratio (ITR) in conventional DPA, and it optimizes the ITR from 4:1 to 2:1 for wider band. Moreover, most of the components of the DPA including power divider and matching networks use lumped inductors and capacitors instead of long transmission line (TL) for a smaller space area. The whole circuit is designed and simulated using Agilent’s advanced design system (ADS). The simulated small-signal gain of DPA is 8–11 dB and the saturation output power is more than 39.5 dBm with 800 MHz band from 4.5 GHz to 5.3 GHz. At 6-dB output power back-off, the DPA demonstrates 38–41.3% power added efficiency (PAE), whereas 44–54% PAE is achieved at saturation power.

Highlights

To meet increasing demands for high data transmission speed and low transmission delay, 5th generation (5G) wireless systems have been formulated, which adopt new complex modulation schemes, such as orthogonal frequency division multiplexing (OFDM) [1]
This power divider adopts high-pass π-shape λ/4 transformers composed of lumped inductors and capacitors instead of traditional 90-degree transmission line (TL) which is not suitable for miniaturization, given that its physical length is more than 5 mm at 4.9 GHz
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Summary

Introduction

To meet increasing demands for high data transmission speed and low transmission delay, 5th generation (5G) wireless systems have been formulated, which adopt new complex modulation schemes, such as orthogonal frequency division multiplexing (OFDM) [1]. This modulation can heavily enhance the spectrum utilization, but it will generate unexpected high peak-to-average power ratio (PAPR) signals at the same time. This implementation suffers from a narrow bandwidth which is less than 10% due to the dispersion behavior of λ/4 TLs, and DPA performance deterio3roafte1s1 outside the center frequency.

Circuit Design

Design of Power Divider

The Implementation of DPA

Findings

Conclusions