A bounded search algorithm for segmented channel routing for FPGA's and associated channel architecture issues

Abstract

The segmented channel routing problem arises in the context of a special type of architecture called field programmable gate arrays (FPGA's), which contain predefined segmented routing tracks that can be connected together to form longer segments. The segments may be connected to the pins of the gates by programmable elements. The segmented channel routing problem is formulated as a special case of a matrix row matching problem. A bounded tree search algorithm has been developed which provides a wide spectrum of solutions compromising the fixed available resources and the given requirements. The algorithm is complete; i.e., it finds a solution if one exists. We have also developed an algorithm to generate channel segmentation based on distribution of nets across channels. The segmented channels are evaluated on the basis of performance versus cost criteria. The algorithms have been implemented in C on an Apollo 4000 workstation. >