Abstract

AbstractThis paper introduces a binary‐based on‐chip cellular neural network (CNN) solution for pixel‐level snakes. Every cell in the array comprises circuitry for B/W and grey‐scale processing. The B/W processing is performed with a positive range high‐gain discrete‐time (DT)CNN model with 1‐bit of programmability. The grey‐scale processing is executed on a dedicated sub‐cell. The design efforts are mainly focused on area consumption and processing speed. The result is a chip with a resolution of 9 × 9 cells in a 0.18 µm CMOS technology process and a density of more than 700cells/mm2. Simulations at schematic level lead to a time of less than 100ns for every DTCNN step. The peak power dissipation is kept at a few watts in a hypothetical chip of 128 × 128 cells. Copyright © 2006 John Wiley & Sons, Ltd.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.