A BiCMOS wide-lock range fully integrated PLL

Abstract

A fully integrated Phase Locked Loop (PLL) with wide lock range is presented in this paper. The designed structure of the PLL is based on the charge-pump type with a differential architecture Voltage Controlled Oscillator (VCO) building block. In the proposed VCO, current mirrors are used as the active load of the source-followers which allow a high stability of VCO oscillation within a wide control range. The PLL has been implemented in 0.8 /spl mu/m BiCMOS technology without the need of any external components. It operates with a lock range of 14 to 420 MHz. The lock time is 15 /spl mu/S. The resulting layout area and the power dissipation of the whole PLL are 0.65 mm/sup 2/ and 18 mW respectively.