A Back Illuminated 6 µm SPAD Pixel Array with High PDE and Timing Jitter Performance

Abstract

We present a high-performance Single Photon Avalanche Diode (SPAD) pixel array sensor with 3D-stacked Back Illumination (BI) fabricated via a 300 mm CMOS process platform. In comparison to our 10 µm pixel generation [1], the 6 µm generation comes with several improvements. In particular, the top-tier pixel chip makes use of a Pyramid Surface for Diffraction (PSD) that boosts the Photon Detection Efficiency (PDE) in the near-infrared [2]. Not only did we achieve a PDE of over 20% at 940 nm with 3.0 V excess bias, but via pixel potential re-engineering, we could also improve the timing jitter beyond our 10 µm architecture. As in our previous SPAD sensor generation, the connection to the bottom-tier readout circuit chip is realized via Cu-Cu bonding to maximize the sensor's fill factor. This new 6 µm SPAD sensor paves the way to direct-Time of Flight (d-ToF) with even higher efficiency and accuracy than was previously possible.