Abstract

This work presents the world’s first neural signal processor for seizure prediction, which includes a preprocessing unit, a feature extractor, a reconfigurable support vector machine (SVM) kernel, and a postprocessing unit. Seizure prediction performance is enhanced by on-chip training for model adaptation. Design optimization is applied across the layers of abstraction to minimize the area and energy. The area of the feature extractor is reduced by 28% with an approximated energy operator (AEO). The proposed scaling-based Newton–Raphson (NR) divider reduces the required number of iterations for division by 62.5%. For alternating direction method of multipliers (ADMM)-based SVM training, the computational complexity is reduced by up to 99.9% through pointer-based matrix multiplication. By leveraging the LDL decomposition, 80% multiplications for updating weights are saved. The chip achieves a seizure prediction performance with a 92.0% sensitivity and a 0.57/h false alarm rate (FAR). The training latency is 8.44 ms with a power dissipation of 2.31 mW at 6.05 MHz. Compared with an ARM Cortex-M3 microcontroller, this work achieves a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$124\times $ </tex-math></inline-formula> higher area efficiency and a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$299\times $ </tex-math></inline-formula> higher energy efficiency. The chip also supports seizure detection and achieves a sensitivity of 98.6% and an FAR of 0.18/h, exceeding the state-of-the-art designs.

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