Abstract
With the development of technology and The Times, the industry has higher and higher requirements for chip performance. Using better circuit design to achieve this goal has become the direction of researchers today. The 4-bit absolute value detector is one of the most important and basic circuits in computer storage and data processing. The effective improvement of its performance will greatly promote the improvement of processing efficiency in the whole chip industry. This project is to design a circuit of a 4-bit absolute value detector. The main functions it implements are it can get the absolute value of 2’s complement, then compare the 3-bit absolute value with a 3-bit threshold value. This paper first divides the design into three parts: absolute module, comparison module and other small modules. Minimize the delay by exploring the critical path and changing the gate size. Finally, through theoretical calculation and optimization, the optimal scheme designed in this paper is determined. The results of this paper will be helpful to the further development of related industries.
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