A 93.4-dB SNDR single-ended SAR ADC with a hybrid R–C DAC

Abstract

In highly-integrated automatic test equipment (ATE) systems, the quantization process of single-ended analog signals demands high-precision ADCs. This paper presents a high precision single-ended SAR ADC with a hybrid R–C DAC. The proposed SAR ADC is demonstrated through sequential modeling in MATLAB, pre-layout and post-layout simulation. Designed in 0.18 μm BCD process, the post-layout simulation results show that it achieves a peak SNDR of 93.4-dB, a peak SFDR of 98.6-dB with a 250 kHz bandwidth. The power consumption of this SAR ADC is 5.96 mW with 5V supply. The Schreier Figure-of Merit (FoMSNDR) is 169.6-dB. The presented ADC is suitable for low-speed, high-precision ATE systems.