A 900-MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications

Abstract

A monolithic CMOS local oscillator utilizing a delay-locked loop (DLL)-based frequency multiplier technique to synthesize a 900-MHz carrier frequency with a low close-in phase noise is described. The prototype, implemented in a double-poly five-metal 0.35-/spl mu/m CMOS technology, achieves a -123 and -127 dBc/Hz phase noise at 60 and 330 kHz offset frequencies, respectively, while dissipating 130 mW from a 3.3-V supply. This prototype satisfies the specification of the IS-137 AMPS/TDMA dual-mode standard.