Abstract
In this paper, a high-resolution time-to-digital converter (TDC) based on a field programmable gate array (FPGA) device is proposed and tested. During the implementation, a new architecture of TDC is proposed which consists of a measurement matrix with 1024 units. The utilization of routing resources as the delay elements distinguishes the proposed design from other existing designs, which contributes most to the device insensitivity to variations of temperature and voltage. Experimental results suggest that the measurement resolution is 7.4 ps, and the INL (integral nonlinearity) and DNL (differential nonlinearity) are 11.6 ps and 5.5 ps, which indicates that the proposed TDC offers high performance among the available TDCs. Benefitting from the FPGA platform, the proposed TDC has superiorities in easy implementation, low cost, and short development time.
Highlights
A time-to-digital converter (TDC) converts time into digital code, and can be regarded as a time sensor
TDC is utilized to measure the time interval or pulse width that corresponds to physical events with high resolution in many applications, such as integrated circuit testing [1,2,3] especially in all-digital phase-locked loop (ADPLL), laser ranging [4], image sensors for fluorescence lifetime imaging (FLIM) [5,6], time-of-flight positron emission tomography (TOF-PET), and high energy physics (HEP) [7,8]
TDC based on a time-to-amplitude conversion method is realized by combining time-to-amplitude conversion and analog-to-digital converters (ADC) [9,10]
Summary
A time-to-digital converter (TDC) converts time into digital code, and can be regarded as a time sensor. TDC is utilized to measure the time interval or pulse width that corresponds to physical events with high resolution in many applications, such as integrated circuit testing [1,2,3] especially in all-digital phase-locked loop (ADPLL), laser ranging [4], image sensors for fluorescence lifetime imaging (FLIM) [5,6], time-of-flight positron emission tomography (TOF-PET), and high energy physics (HEP) [7,8]. TDC architecture can be implemented in analog or digital approaches. Time stretching and time-to-amplitude conversion methods are two classical analog TDC methods. TDC based on a time-to-amplitude conversion method is realized by combining time-to-amplitude conversion and analog-to-digital converters (ADC) [9,10]. Through careful design and layout, analog TDC can obtain good resolution (about 8 ps [10]) at the expense of high power consumption. The area-consuming devices in analog TDC hinder its implementation in integrated circuits
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