A 6b 800MS/s 3.62mW Nyquist AC-coupled VCO-based ADC in 65nm CMOS

Abstract

A Nyquist VCO-Based ADC architecture is proposed for AC-coupled systems which are commonly used in high-speed wireline and wireless communications. The proposed ADC utilizes a built-in high pass filter as an analog differentiator, replacing the digital differentiator in conventional oversampling VCO-based ADCs. As a result, it avoids quantization noise shaping and achieves wideband Nyquist operation, first order anti-aliasing filtering and improved VCO linearity without calibration. The ADC prototype achieves peak SNDR of 34dB and SFDR of 50dB with over 400MHz input bandwidth and sampling rate of 800MS/s. It occupies an active area of 0.01mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and consumes 3.62mW in 65nm CMOS.