Abstract

Active gate driving has been demonstrated to beneficially shape switching waveforms in Si- and SiC-based power converters. For faster GaN power devices with sub-10-ns switching transients, however, reported variable gate driving has so far been limited to altering a single drive parameter once per switching event, either during or outside of the transient. This paper demonstrates a gate driver with a timing resolution and range of output resistance levels that surpass those of existing gate drivers or arbitrary waveform generators. It is shown to permit active gate driving with a bandwidth that is high enough to shape a GaN switching during the transient. The programmable gate driver has integrated high-speed memory, control logic, and multiple parallel output stages. During switching transients, the gate driver can activate a near-arbitrary sequence of pull-up or pull-down output resistances between 0.12 and 64 Ω. A hybrid of clocked and asynchronous control logic with 150-ps delay elements achieves an effective resistance update rate of 6.7 GHz during switching events. This active gate driver is evaluated in a 1-MHz bridge-leg converter using EPC2015 GaN FETs. The results show that aggressive manipulation of the gate-drive resistance at sub-nanosecond resolutions can profile gate waveforms of the GaN FET, thereby beneficially shaping the switch-node voltage waveform in the power circuit. Examples of open-loop active gate driving are demonstrated that maintain the low switching loss of constant-strength gate driving, while reducing overshoot, oscillation, and EMI-generating high-frequency spectral content.

Highlights

  • A CTIVE gate driving dynamically changes the gate resistance [1]–[6], gate voltage [7]–[9], or gate current [10]–Manuscript received October 26, 2016; accepted January 31, 2017

  • Experiment 1: Speeding Up Turn On. The aim of this experiment is to demonstrate that active gate driving can suppress gate voltage overshoot and, allow faster driving than is possible with constant-strength driving

  • The result is that active gate driving has allowed the speed of 2 Ω driving to be combined with the gate voltage overshoot of 3.6 Ω driving

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Summary

INTRODUCTION

A CTIVE gate driving dynamically changes the gate resistance [1]–[6], gate voltage [7]–[9], or gate current [10]–. In bridge-leg topologies, it implies an increase in the dead time that further increases power loss [19] Another reported challenge is that commercially available low-voltage GaN devices exhibit a low margin between the gate-source voltage required to enhance the channel, and the absolute maximum gate-source voltage above which the gate is permanently damaged [20]. This paper is organized as follows: Section II presents the 150-ps high-speed programmable resistance gate driver for GaN FETs. In Section III, this gate driver is modeled and simulated in a GaN-based switching circuit, and gate driving strategies for shaping the turn-on and turn-off switching waveforms are provided. This paper focusses on three example objectives: 1) turning GaN gates on faster, without incurring gate voltage overshoot; 2) eliminating overshoot in switch-node voltage waveforms; 3) attenuating high-frequency components of switch-node voltage spectra

Overview of the Driver Architecture
Signal Generation to Control the Output Stage
Output Resistance Values and Drive Strength
Main and Fine Driver
Degrees of Freedom in the Generation of Drive Resistance Sequences
MODELING OF ACTIVE GATE DRIVING OF GAN FETS
Circuit Model and Extraction of Parasitics
Gate Driving Strategy
Simulated Application of the Active Gate Driving Strategy
SYSTEM IMPLEMENTATION FOR ACTIVE GATE DRIVING OF GAN FETS
Experiment 1
Experiment 2
Experiment 3
CONCLUSION

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