A 65-nm low-noise low-cost ΣΔ modulator for audio applications

Abstract

This paper introduces a low-noise low-cost ΣΔ modulator for digital audio analog-to-digital conversion. By adopting a low-noise large-output swing operation amplifier, not only is the flicker noise greatly inhibited, but also the power consumption is reduced. Also the area cost is relatively small. The modulator was implemented in a SMIC standard 65-nm CMOS process. Measurement results show it can achieve 96 dB peak signal-to-noise plus distortion ratio (SNDR) and 105 dB dynamic range (DR) over the 22.05-kHz audio band and occupies 0.16 mm2. The power consumption of the proposed modulator is 4.9 mW from a 2.5 V power supply, which is suitable for high-performance, low-cost audio codec applications.