Abstract
This paper presents a low-power implementation of a 64 Gb/s PAM-4 transmitter (TX) by using 3-tap feed-forward equalization (FFE) and Gm-regulated active-feedback driver. The FFE tap generation is merged into serializer to minimize the overhead of FFE, by replacing a power-hungry delay generator. An active-feedback inverter based driver is also proposed to achieve a larger output swing compared with a resistive- feedback driver with limited output swing. The prototype chip is fabricated in 28nm CMOS technology and occupies 0.185 mm2. The proposed TX achieves the data rate of 64 Gb/s while consuming 97.2 mW, which exhibits the state-of-the-art energy efficiency of 1.5 p.J/b.
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