Abstract
This brief presents a 64-channel neural recording system-on-chip (SoC) with a 20-Mb/s wireless telemetry. Each channel of the analog front end consists of a low-noise bandpass amplifier, featuring a noise efficiency factor of 3.11 with an input-referred noise of 5.6 $\mu\text{V}_{\mathrm{rms}}$ in a 0.001- to 10-kHz band and a 31.25-kSps 6-fJ/conversion-step 10-bit SAR analog-to-digital converter. The recorded signals are multiplexed in the digital domain and transmitted via an 11.7% efficiency pulse-position modulation ultrawideband transmitter, reaching a transmission range in excess of 7.5 m. The chip has been fabricated in a 130-nm CMOS process, measures 25 mm2, and dissipates 965 $\mu\text{W}$ from a 0.5-V supply. This SoC features the lowest power per channel (15 $\mu\text{W}$ ) and the lowest energy per bit (48.2 pJ) among state-of-the-art wireless neural recording systems with a number of channels larger than 32. The proposed circuit is able to transmit the raw neural signal in a large bandwidth (up to 10 kHz) without performing any data compression or losing vital information, such as local field potentials.
Highlights
Wireless multi-channel neural recording systems are highly demanded in neuroscience experiments with laboratory animals to study the complex brain behavior
The pioneering work in [2] detects and transmits just the occurrence of action potentials (APs), while the system in [3] transmits only the samples corresponding to the detected spikes, reducing the output data rate to 1.4 Mbps for 64 channels
The 64-channel neural recording SoC has been fabricated in a standard 130-nm CMOS. It occupies an area of 25 mm2, including pads, and its overall power consumption is 965 μW from 0.5-V supply
Summary
Wireless multi-channel neural recording systems are highly demanded in neuroscience experiments with laboratory animals to study the complex brain behavior. The requirements of a large number of recording channels (64 or higher) and a wide signal bandwidth (10 kHz) translate to a high output data rate (>10 Mbps) of the transmitter This throughput should be reached with minimum power consumption to allow the use of a battery supply in neuroscience systems and to limit tissue necrosis and allow wireless supply in neuroprosthetic devices. Existing SoC designs overcome this limitation featuring on-chip processing to narrow the required bandwidth To this aim, the pioneering work in [2] detects and transmits just the occurrence of action potentials (APs), while the system in [3] transmits only the samples corresponding to the detected spikes, reducing the output data rate to 1.4 Mbps for 64 channels. Spike detection results in a loss of vital information, such as Local Filed Potentials (LFPs) in the 1-300 Hz band
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