A 60-GHz efficiency-enhanced on-chip dipole antenna using helium-3 ion implantation process

Abstract

A 60-GHz CMOS on-chip dipole antenna with efficiency-enhancement technique is presented. A helium-3 ion irradiation process is used to reduce the substrate losses of the on-chip antenna. The radiation efficiency of the antenna is doubled using the ion implantation technique. The antenna is fabricated in a 65-nm CMOS technology with a core area of 0.48 mm. The on-chip antenna achieves a peak gain of -4.1 dBi at 60GHz and a gain fluctuation of around ±1dB from 57 GHz to 67GHz. Keywords—Millimeter-wave, on-chip dipole antenna, CMOS, efficiency-enhanced, helium-3 ion implantation