Abstract

This paper presents a fully integrated 60 GHz front-end for phased array receivers. For the first time in the literature a phase controlled phased locked loop (PC-PLL) is used for beamforming at 60 GHz. The front-end performs a two stage frequency down-conversion, first from 60 GHz to 20 GHz, then from 20 GHz to quadrature baseband. Both the local oscillator signals at 20 GHz and 40 GHz are generated by a single 20 GHz QVCO without any frequency multipliers. The measured results show an input return loss better than −10 dB between 57.5 GHz and 60.8 GHz, 15 dB voltage gain, and 9 dB noise figure. Two-tone measurements show a −12.5 dBm IIP 3 , 29 dBm IIP 2 , and −24 dBm ICP 1dB . The phase control of the PLL has a resolution of 3.2 degrees and the control range exceeds 360 degrees. The chip consumes 80 mA from a 1.2 V supply, and measures 1400µm × 660µm (900µm × 500µm excl. pads) incl. LNA, mixers, and PC-PLL in a 90 nm RF CMOS process.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.