Abstract
A 6-GHz phase-locked loop based spread-spectrum clock generator employing a self-oscillating technique is proposed. The clock generator adopts the property of the inherent oscillation of a charge-pump PLL while introducing no extra quantization noise. With the amplitude and frequency control, modulation frequency and frequency deviation can be tuned at 31.5 kHz and 5000 ppm, respectively. The measured EMI reduction is 12.5 dB at the 100-kHz resolution bandwidth. The measured root mean square jitter is 2 ps and peak-to-peak is 15 ps. This work was fabricated in a 90-nm digital CMOS technology, occupies 0.54 and consumes 14.4 mW from a 1.2-V supply.
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More From: IEEE Transactions on Circuits and Systems I: Regular Papers
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