A 6-b, 4 GSa/s GaAs HBT ADC

Abstract

A GaAs-AlGaAs heterojunction bipolar transistor (HBT) process was developed to meet the speed, gain, and yield requirements for analog-to-digital converters (ADC's). The HBT has current gain of over 100 and f/sub T/ and f/sub MAX/ of over 50 GHz. A 6-b, 4 GSa/s (4 giga-samples/s) ADC was designed and fabricated in this process. The ADC uses an analog folding architecture, includes an on-chip master-slave track-and-hold (T/H) circuit, and provides Gray-encoded digital outputs. The ADC achieves 5.6 effective bits at 4 GSa/s, a faster clock rate than any noninterleaved semiconductor ADC reported to date. It has a resolution bandwidth (the frequency at which effective bits has dropped by 0.5 b) of 1.8 GHz at 4 GSa/s, higher than any published ADC. The chip operates at up to 6.5 GSa/s. GaAs HBT IC's are especially prone to high operating temperatures. This led to reliability problems that were overcome by the use of a fast DC thermal simulator written for this project. A SPICE model for self-heating effects is also described.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>