Abstract
This paper presents the design and simulation of a broadband two-stage power amplifier (PA) in 0.13 μm SiGe BiCMOS that is applicable to ISM band applications at 60 GHz, and E−band applications (71–76 GHz, 77 GHz, 81–86 GHz, and 92–95 GHz). The driver stage utilizes a cascode with a novel shunt-shunt feedback structure to maximize the gain, while a dual Y current transmission line divider and combiner are designed and optimized in the inter-stage and output matching of the second stage, respectively, to maximize the output power and power added efficiency (PAE). Based on the proposed approach and staggered tuning technique, the post-layout simulation results demonstrate 18 dB power gain with 2 dB ripple through the operating band. Additionally, the PA achieves average PAE and saturated output power of 19%, and 16 dBm, respectively, over the whole band.
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