A 53 MHz Randomly Triggered Synchronous Predetermined Scaler for Accelerator Diagnostics

Abstract

A 53 MHz random triggered recycling, predetermined start-stop scaler is described. The scaler has a range from 2-to-9999 counts, sensitivity of 40 mV rms and provides both NIM and TTL standard logic outputs. The scaler is composed mainly of standard ECL integrated circuits including universal counters, configured in a synchronous parallel carry connection, and ordinary logic gates and flip-flops. Special circuitry has been designed to prevent start-up counting errors due to the phase randomness between the applied start triggering and input signal transitions. Following a start trigger, the scaler cycles until disabled, delivering an output pulse each time the predetermined count is reached. The time jitter of the output pulses with respect to the periodic input signal is less than 0.1 ns. High resolution examination of the behavior of individual charge bunches within the accelerator is made possible when the scaler is set to count the machine's harmonic number. If the scaler is set one digit away from the harmonic number, the output pulses advance one bunch for each turn around the machine, allowing a sequential display of the contents of each bucket in the machine.