A 53–67 GHz Low-Noise Mixer-First Receiver Front-End in 65-nm CMOS

Abstract

In this paper, we present a mixer-first receiver front-end suitable for millimeter wave (mm-wave) applications. The proposed architecture includes a modified single-balanced mixer core with an on-chip balun in order to provide a differential output from an injected single-ended local oscillator signal. The mm-wave active balun incorporates a cascode cross-coupled structure to achieve a high voltage gain with low amplitude and phase imbalance. The inter-stage inductors are utilized to increase the mixer conversion gain (CG). Moreover, by manipulating the transistor body effect in the transconductance stage, the CG and noise figure of the mixer are further improved. The mixer also achieves a high input return loss which makes it suitable for the mixer-first receivers. As a proof-of-concept, a 53–67 GHz mixer with a center intermediate-frequency of 20 GHz is designed and implemented in a 65-nm CMOS process. The mixer achieves a measured peak conversion gain of 12.1 dB and a 1-dB compression point of −5 dBm. Furthermore, the fabricated mixer achieves a minimum double-sideband (DSB) noise figure of 6.5 dB over its bandwidth. The whole chip consumes 11.5 mW from a 1-V supply and excluding the pads occupies 0.27 mm2 of silicon area.