A 512 K-bit magneto resistive memory with switched capacitor self-referencing sensing

Abstract

A 512 K-bit nonvolatile magnetoresistive memory with a switched-capacitor self-referencing sensing scheme is reported. This memory is economical since it requires only one mask beyond a typical CMOS process and has rad hard, scalable, and no wear-out properties. This memory has a cell size of 2.0 mu m*10 mu m, logic buried under its cells, and a 0.3 cm/sup 2/ die. It is useful for disk caches and for replacing plated wire memories in aerospace applications.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>