Abstract
A recently developed microprogrammable, high-resolution, real-time geometrical mapping processor VLSI is presented. The processor computes pixel addresses within the frame-buffer memory according to user-specified geometrical mapping functions. Its architecture permits high-speed operations and library extensions through a combination of elementary functions. It includes a CORDIC function generator, consisting of a one-dimensional pipeline array with high-speed parallel arithmetic circuits, and a pipeline control method. This results in a 50-MHz throughput rate with an accuracy of 20 bits using 1.2- mu m CMOS technology. The processor will be useful in high-definition television (HDTV) systems.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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