A 50 mHz Sinh-Domain High-pass Filter for Realizing an ECG Signal Acquisition System

Abstract

A Sinh-Domain high-pass filter topology with 50 mHz cutoff frequency is proposed in this paper. The realization of the required extremely large time constant is achieved through the employment of appropriate current division network, constructed from appropriate configured dividers. As an application example, an electrocardiography (ECG) signal acquisition system is realized, where 50/60 Hz bandstop (notch) and low-pass filters have also been employed. Using the Analog Design Environment of the Cadence software and MOS transistors parameters provided by the TSMC 180 nm CMOS process, the performance of all intermediate stages has been evaluated, in terms of the most important performance factors. In addition, the behavior of the proposed system has been studied through the stimulation with noisy ECGs.