A 5 kHz-BW 18-bit zoom ADC with gain-enhanced CLS-assisted FIA

Abstract

This paper presents a 5 kHz-BW 18-bit fully dynamic zoom ADC for low-power and high-resolution applications. A gain-enhanced cascode floating inverter amplifier (FIA) with correlated level shifting (CLS) assisted is proposed to achieve 68.5 dB effective gain with high energy efficiency. The data-weighted averaging (DWA) technique is implemented to suppress the nonlinearity caused by feedback DAC mismatch. Meanwhile, the coefficients of ΔΣ modulator are optimized for low power consumption. The proposed zoom ADC is designed in a 0.18 μm CMOS process. The post-layout simulation results show a peak SNDR of 110.4 dB and a peak SFDR of 114.8 dB with a 5 kHz-BW at an oversampling ratio (OSR) of 256. The power consumption of the proposed ADC is 342 μW at 2.56 MHz sampling frequency with 1.8 V supply, and the Schreier figure-of-merit (FoMSNDR) is 182.05 dB.