Abstract

This paper reports the first multifunctional 0.4-/spl mu/m BiCMOS-based transceiver chip developed for 5-GHz-band Gaussian minimum-shift keying modulation wireless systems. The chip integrates a low-noise radio-frequency amplifier, a down-mixer, and an intermediate-frequency (IF) amplifier in the down-converter path; an IF amplifier, a limiter, an up-mixer, and a buffer amplifier in the up-converter path; and a frequency doubler and a local oscillator amplifier in the local oscillator path. The chip featuring gain attenuation as well as standby mode operation uses a single 2.6-5.2-V bias voltage and dissipates 56 mW in receive mode and 66 mW in transmit mode. The transceiver chip size is 3.0/spl times/2.4 mm/sup 2/.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.