Abstract
A 915-MHz binary frequency-shift keying (BFSK) transmitter is proposed in this letter. The proposed transmitter architecture allows relaxing the frequency-tuning requirement of the conventional Internet of Things transceiver by the frequency-tripling signal-path topology. The tuning-range requirement is significantly improved down to 4% with the proposed signaling scheme, and this results in the ultralow-power synthesizer implementation. The proposed frequency tripler provides good spur rejection performance, and the adoption of a class-D switching power amplifier (PA) further improves the efficiency of the BFSK transmitter. Implemented in a 55-nm CMOS technology, the proposed transmitter achieves the output power of 5.5 dBm and 31.9% efficiency with only $207~\mu \text{W}$ of power consumption from the synthesizer.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
