A 4-Channel Neural Stimulation IC Design with Charge Balancing and Exponential Current Output

Abstract

This paper presents a 4-channel neural stimulation integrated circuit design with exponential current output. Using exponentially decaying current output for neural stimulation, the excessive headroom voltage of the output stage can be eliminated and the power efficiency of the stimulator can be improved. In this work, the exponential current generation circuit is improved to realize longer duration for stimulation pulse. In addition, a charge balancing technique is used to minimize the residual charge during stimulation. The stimulator IC is implemented in a 180-nm CMOS process, occupying a core area of 1.93 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , The simulation results show that maximum power efficiency of the output stage reaches 90% and the maximum stimulation duration has been increased by 3 times compared to previous work. The results also show that the short-time pulse insertion circuit for charge balancing can maintain the electrode voltage within a safe range <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathbf{V}_{\mathbf{ref}}\pm 50\mathbf{mV})$</tex> , and the maximum residual charge in a single cycle is only 84 pC.