Abstract
ABSTRACTA design of a 460 GHz substrate‐integrated‐waveguide (SIW) slot antenna in a 65‐nm CMOS process is presented in thisarticle. The size of the antenna is 380 μm × 224 μm. An inductor identification layer is placed in the layout to reduce the internal metal density requirements significantly. The proposed antenna, which includes metal dummy fill to be compliant with the 65 nm process design rules, was simulated using HFSS. The antenna simulated with a 0.5 mm Si substrate has a maximum gain of 0.09 dBi and a radiation efficiency of 29.1%. The bandwidth of S11 below −10 dB is 25.3 GHz. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:347–351, 2016
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