Abstract
A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e−/s at 60 °C, an ultra-low read noise of 0.90 e−·rms, a high full well capacity (FWC) of 4100 e−, and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed.
Highlights
Scaling down pixel size is absolutely necessary for high resolution imaging and quanta image sensors [1]
Sensor [9], and 0.8 μm pixel simulation might boost the light signal, reduce noise, and control the process variation caused by critical dimension fluctuations and mask overlay errors, which are more serious in submicron pixel generation
Where N pixel, V circuit, and V source follower represent the noise generated at the pixel and the noise where N pixel, V circuit, and V source follower represent the noise generated at the pixel and the noise voltage generated in the circuit and source follower, respectively, Av is the circuit gain, CG is the voltage generated in the circuit and source follower, respectively, Av is the circuit gain, CG is the conversion gain, Cox is the source follower gate capacitance, W is the source follower device width, conversion gain, Cox is the source follower gate capacitance, W is the source follower device width, L is the source follower device length, and N trap density is the trap state density
Summary
Scaling down pixel size is absolutely necessary for high resolution imaging and quanta image sensors [1]. Stacked CMOS image technology sensor (CIS)has chips enable a more and flexible process illumination been developed has manufacturing enabled drastic. CMOS image sensor (CIS) chips enable a more flexible might the light signal, reduce and control the process variation caused critical processboost dedicated to image sensors [7]. Sensor [9], and 0.8 μm pixel simulation might boost the light signal, reduce noise, and control the process variation caused by critical dimension fluctuations and mask overlay errors, which are more serious in submicron pixel generation. A silicon result of 0.9 μm pixels with well-balanced light and dark performance, making full use of a highly manufacturable 45 nm advanced technology with a stacked CMOS image sensor [9], and 0.8 μm pixel simulation data are presented
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