A 45 mW RTD/HBT MOBILE D-Flip Flop IC Operating up to 32 Gb/s

Abstract

A low-power RTD/HBT MOBILE (monostable-bistable transition logic element)-based D-flip flop is proposed and implemented using an InP-based monolithic RTD/HBT IC technology. The proposed MOBILE-based D-flip flop consists of a current mode logic (CML) type MOBILE core with complementary outputs and a CML-type SET/RESET latch, and has several advantages of the reduced device count and low-power consumption over the conventional D-flip flop based on a master/slave configuration. In addition, by using the CML-type SET/RESET latch in the proposed MOBILE-based D-flip flop, the high-speed operation and the compatibility with the conventional ECL interface have been achieved. The operation of the fabricated D-flip flop has been confirmed up to 32 Gb/s with a low-power consumption of 45 mW