Abstract

In this paper the design and measurement results of a 42 Gbps vertical-cavity surface-emitting laser (VCSEL) driver is presented. A 2-tap feed-forward equalizer (FFE) architecture with adjustable delay is chosen and optimized to decrease the inter-symbol interference of the VCSEL data transmission. Circuit realizations of different blocks are presented as well. The chip was fabricated in a 14 nm SOI CMOS technology and bonded to a common-cathode 20 GHz VCSEL. Optical measurements show that error-free data transmission up to a data rate of 42 Gbps was possible. The total power dissipation, including the one of the VCSEL, is 117 mW, which provides a power efficiency of 2.8 pJ/bit. To the best of the author's knowledge, this is fastest VCSEL driver circuit in a CMOS technology presented so far.

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