A 40–67 GHz Power Amplifier With 13 dBm ${\rm P}_{\rm SAT}$ and 16% PAE in 28 nm CMOS LP

Abstract

Pushed by the availability of large fractional bandwidths, many well-established applications are focusing mm-wave spectrum for product deployment. Generation of broadband power at mm-waves is challenging because a key target such as the efficiency trades with the gain-bandwidth (GBW) product. The major limit is the capacitive parasitics at the interstage between driver and power devices. The latter are designed with a large form factor so as to deliver the desired output power and are commonly biased in class-AB to achieve high drain efficiency, penalizing GBW. In this paper, a design methodology for interstage and output matching networks targeting large fractional bandwidth and high efficiency is proposed. Leveraging inductively coupled resonators, we apply Norton transformations for impedance scaling. In both networks, topological transformations are employed to include a transformer, achieve the desired load impedance and minimize the number of components. A two-stage differential PA with neutralized common source stages has been realized in 28 nm CMOS using low-power devices. The PA delivers 13 dBm saturated output power over the 40–67 GHz bandwidth with a peak power-added efficiency of 16% without power combining. To the best of author's knowledge, the presented PA shows state-of-the-art performances with the largest fractional bandwidth among bulk CMOS mm-wave PAs reported so far.