Abstract

This paper presents the design and implementation of a 4 $\times$ 4 multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) baseband receiver for indoor high-throughput wireless communication systems. The receiver uses bandwidths of 40, 80, and 160 MHz that correspond to three operation modes of 128, 256, and 512-point FFT, respectively. Four spatial streams are supported to offer the maximum uncoded data rate of 2.6 Gbps. Channel pre-processing based on sorted QR decomposition and the non-constant K-best soft-output MIMO detector are adopted to enhance the system performance. The addressing scheme for the QR phase memory is proposed to deal with the processing-time discrepancy between the write-in and read-out accesses. The high-throughput pipelined architecture for the non-constant K-best soft-output MIMO detector with selected discard-paths is analyzed to show a balance between performance and complexity. This receiver IC integrates 1.034 M logic gates as well as a total of 835 Kb SRAM in 90 nm CMOS technology and can generate hard output for 64-QAM constellation. The coded system performance is also provided with the soft-output MIMO detection. From the measurement results, the power consumption of the chip is 424 mW, 97 mW, and 26 mW at 1.16 V, 0.8 V and 0.66 V, respectively, for operations in 160 MHz, 80 MHz, and 40 MHz bandwidth modes. Compared to the prior works for 80 MHz channel bandwidth, this work supports wider channel bandwidth and achieves higher throughput.

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